A Comparative Study of On-Chip CMOS S&H Voltage Sensors for Power Integrity: SOI vs. Bulk
Qazi Mashaal Khan, Richard Perdriau, Mohammed Ramdani, Mohsen Koohestani
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This paper evaluates the performance of two onchip sample & hold (S&H) voltage sensors, usable for power integrity measurements, with the aim to compare silicon-oninsulator (SOI) & bulk CMOS technologies. Both sensors were designed and simulated in 180 nm 5 V AMS-bulk and XFAB-SOI processes, using optimized parameters and compatible devices. The fundamental variables analyzed were power consumption, leakage current, slew rate (SR), and transient output voltage, under process, voltage and temperature variations. Compared to bulk technology, SOI was found to have lower power consumption (by 2.2 mW in average) and leakage supply current (by 9.5 pA at 27?C), higher sensitivity to process variations (up to 88% additional slew rate versus 39% at 80?C), higher resilience to temperature changes (6% in output voltage), and a larger occupied area. The SOI sensor is intended to be fabricated and used to evaluate injected continuous wave and transient disturbances as well as voltage fluctuations due to internal activity on power distribution networks.