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SSCS
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Abstract - Traditionally, ADC architectures have been sorted into distinct categories such as FLASH, SAR, pipeline, and delta-sigma. Recently, improvements in ADC power, speed, and resolution have been enabled by hybrid approaches that combine techniques from many ADC architectures. Further, this trend of hybrid design is extended beyond the choice of quantizer to include a mix of circuit topologies in key ADC building blocks. The resulting degrees of freedom allow designers to fully optimize their converters, leading to performance levels beyond what can be achieved with conventional architectures. This tutorial will start with a general overview of key ADC architectures (e.g. Flash, SAR, pipeline and delta-sigma), highlighting basic operation and design trade-offs. Second, the architectural hybrid designs in consideration of various quantizer options will be discussed. Last, illustrative examples of hybrid circuit topologies and techniques will be discussed, with emphasis on design choices that enabled performance benefits for the specific application of interest.
Bio - Seng-Pan (Ben) U received the dual Ph.D. degree from the University of Macau (UM) and Instituto Superior Técnico, Portugal in 2002. He is currently Professor and Deputy Director of the State-Key Laboratory of Analog & Mixed-Signal (AMS) VLSI of UM. He is also the co-founder & corporate R&D director and Macau site general manager of Synopsys Macau Ltd (Former Chipidea Microelectronics Macau).
He has co-authored 200+ publications, 4 books and co-held 14 US patents. He was A-SSCC 2013 tutorial speaker for energy-efficient data converters and SSCS Distinguished Lecturer (2014-2015). He was the co-recipient of the 2014 ESSCIRC Best paper award, and also the advisor for student awards of the SSCS Pre-doc Achievement Award, ISSCC Silk-Road Award, and A-SSCC Student Design Contest in the data converter field. He was the 1st recipient from Macau of the National science & technology (S&T) award and the Ho Leung Ho Lee Foundation award. He has received 7 Macau S&T Awards, 2 business awards, and the government Honorary Title of Value. He is currently IEEE Fellow, was also elected as the Scientific Chinese of the Year 2012, and was recently appointed as a member of the S
Bio - Seng-Pan (Ben) U received the dual Ph.D. degree from the University of Macau (UM) and Instituto Superior Técnico, Portugal in 2002. He is currently Professor and Deputy Director of the State-Key Laboratory of Analog & Mixed-Signal (AMS) VLSI of UM. He is also the co-founder & corporate R&D director and Macau site general manager of Synopsys Macau Ltd (Former Chipidea Microelectronics Macau).
He has co-authored 200+ publications, 4 books and co-held 14 US patents. He was A-SSCC 2013 tutorial speaker for energy-efficient data converters and SSCS Distinguished Lecturer (2014-2015). He was the co-recipient of the 2014 ESSCIRC Best paper award, and also the advisor for student awards of the SSCS Pre-doc Achievement Award, ISSCC Silk-Road Award, and A-SSCC Student Design Contest in the data converter field. He was the 1st recipient from Macau of the National science & technology (S&T) award and the Ho Leung Ho Lee Foundation award. He has received 7 Macau S&T Awards, 2 business awards, and the government Honorary Title of Value. He is currently IEEE Fellow, was also elected as the Scientific Chinese of the Year 2012, and was recently appointed as a member of the S
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