Lowering the Barrier to Silicon with Open Source Tools and Tiny Tapeout

Matthew Venn

DOI

IES

Members: Free
IEEE Members: Free
Non-members: Free

Length: 00:48:40

18 Jul 2023

In the last 3 years a huge amount of progress has been made in open source ASIC tooling. In this webinar Matt Venn briefly covers key moments and looks at what the future holds in the rapidly evolving world of open source chip design.

Tags:

Lowering the Barrier

IEEE

ies

tools

More Like This

14 Nov 2024

Week 07 IAS Certificate Course: EMT simulation using PSCAD -Power System Fundamentals

IAS

Members: $150.00
IEEE Members: $250.00
Non-members: $450.00

13 Nov 2024

Systems Thinking in Digital Engineering

1.00 pdh

SYSC

Members: Free
IEEE Members: Free
Non-members: Free

13 Nov 2024

Manufacturing Webinar Series - Exploring Sustainable Alternatives in Semiconductor Manufacturing

1.00 pdh

EDS

Members: Free
IEEE Members: $15.00
Non-members: $20.00