Cryo-CMOS Integrated Circuits for Silicon Qubits in the Quantum Computing Stack Slides

Abstract: Scaling a fault-tolerant quantum computer to millions of qubits required for running a practical algorithm is a daunting challenge. Silicon spin qubits are a potential technology for the scalable implementation of quantum computers thanks to their transistor-like footprint and compatibility with industrial silicon manufacturing. CMOS integrated circuits operating at cryogenic temperature can offer significantly higher system integration and enable scalability for future quantum computers. Complex System-on-Chips (SoCs) with digital, analog and RF capabilities can be integrated with sufficiently low power consumption to be compatible with the requirements of dilution refrigerators. This talk gives an overview of cryo-CMOS integrated circuits for qubit control as a solution to alleviate the cabling bottlenecks that arise with scalability, at all stages of the experimental quantum computing stack, from 4K to within the qubit chip itself at mK.