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Root Cause Analysis for the Phase Noise of the Clock Generator

Yuanzhuo Liu, Siqi Bai, Bo Pu, Zhifei Xu, Bichen Chen, Srinivas Venkataraman, Xu Wang, Jun Fan, DongHyun Kim

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    Length: 00:15:32
10 Aug 2021

The performance of the high-speed links in the electronic system is highly dependent on the quality of the clock signal, which can be quantified by phase noise. The phase noise represents the instabilities of the signal in the frequency domain by measuring the power at various offsets from the carrier frequency. The root cause for the phase noise of the clock output at the resonance frequency is analyzed and identified in this paper. The power supply, the heat sink, and the external crystal are the main sources of the phase noise. Spurious occurs at the frequency of the power rail in the measured phase noise. The heat sink over the chip induces the conductive coupling noise to the clock. The low-frequency bump in the phase noise plot turns out to be induced by the external crystal design of the clock. More attention should be paid to the ground routing of the external crystal to ensure the quality of the clock output.

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    IEEE Members: $11.00
    Non-members: $15.00