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System Exploration and Technology Demonstration of 3D Wafer to Wafer Integrated STT-MRAM Based Caches for Advanced Mobile SoCs

M. Perumkunnil, F. Yasin, S. Rao, S.M. Salahuddin, D. Milojevic, G. Van der Plas, J. Ryckaert, Eric Beyne, A. Furnemont, G.S. Kar

DOI
10.17023/ab1e-yt26
  • EDS
    Members: $5.00
    IEEE Members: $10.00
    Non-members: $20.00
    Length: 00:19:49

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