azad naeemi

Exploring FinFET and Gate All-Around FET in SRAM Cell Arrays at the 3nm Process Node

From Interconnect Materials and Processes to Chip Level Performance: Modeling and Design for Conventional and Exploratory Concepts

Complementary Logic Implementation forAntiferromagnet Field Effect Transistors

A Nonvolatile Fast-Read Two-Transistor SRAM Based on Spintronic Devices

Electrical-Spin Transduction for CMOS Spintronic Interface and Long-Range Interconnects