Gate-All-Around Strained Si 0.4 Ge 0.6 Nanosheet PMOS on Strain Relaxed Buffer for High Performance Low Power Logic Application
A. Agrawal, S. Chouksey, W. Rachmady, S. Vishwanath, S. Ghose, M. Mehta, J. Torres, A.A. Oni, X. Weng, H. Li, D. Merrill, M. Metz, A. Murthy, J. Kavalieros
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15 Dec 2020
